Electron Exposure from the EUV-induced Plasma

More to EUV lithography than just EUV

After a silicon wafer is exposed to EUV light in one of ASML’s EUV lithography systems, there is additional exposure of the resist from electrons that have been released in the EUV-induced plasma. A detailed investigation of this phenomenon was carried out by researchers at National Tsing Hua University, using one of TSMC’s EUV lithography systems. It is covered in the following video.

This additional electron exposure is a source of CD variation and is also likely to exacerbate the incidence of defects in regions which are not supposed to be exposed.