Estimating EUV Production Wafer Throughput in 2026
Effectively less than 100 wafers per hour estimated for real EUV practice, based on the SK hynix filing two days ago
On March 24, in a filing with DART, a repository of Korea’s corporate filings, a nearly 12 trillion won (~8 billion USD) order for EUV scanners was shown as being placed by SK hynix with ASML Korea as the counterparty (Figure 1) [1].
Figure 1. Filing showing nearly 12 trillion won EUV order by SK hynix placed with ASML Korea.
Compared to a previous filing [2], the document appears a bit unusual, with such a large order being placed with a training/repair branch of ASML than with the headquarters. Such a large order would appear to go along with a significant expansion of fab capacity, which easily could run up expenses of tens of billions of USD, exceeding SK hynix’s 2025 profits (32 billion USD) [3]. Yet such a large move has not been announced by SK hynix at this time. However, regardless of whether there will be such an expansion, by just viewing this as a standalone EUV order (~40 NXE:3800 machines), mainly to support its 1c DRAM ramp [4,5], we can get an estimate of the current real-practice productivity of EUV.
To get the estimate, we need three pieces of information: (1) the target number of wafers per month, (2) the number of EUV layers to be used, and (3) the number of EUV machines ordered. We also need to grasp how the number of layers figures in the total wafer throughput.
Suppose we have four EUV machines to be used for four layers of a chip. We can arrange it either in an across-layers fashion or in an all-for-one fashion (Figure 2).
Figure 2. Across-layers vs. All-for-one-layer arrangement of using EUV machines.
By distributing the four machines across the four layers, the flow is streamlined, so that we essentially have a “stream” of four machines supporting the four layers. If a machine can process N wafers in a day, the whole line will output N wafers in one day. We can expect that in 4 days the whole line will produce 4N wafers.
On the other hand, by only using the four machines for one layer for a given period of time, then moving to the next layer, we have the potential for wafers waiting for the masks to be changed, but 4N wafers are still expected to complete the 4 layers in 4 days.
In general, if we have M machines, and L layers, we can expect M/L streams, each containing L machines supporting L layers as in Figure 2. If we take the target number of wafers per month (T), and divide that by the number of streams (M/L), that will give the number of wafers per month each machine should be expected to fulfill at a minimum.
SK hynix had been reported to target 5 layers for 1c DRAM [5], up from 4 for 1b DRAM. Also, it plans to add at least ~ 100,000 wafers per month by early 2027 [4]. Assuming they have received and will use half of the ordered tools (20) for this purpose, we can apply the formula T/(M/L) to get the expected throughput (as wafers per month) per machine (Table 1).
Table 1. Expected EUV machine wafer throughput based on number of layers and number of machines ordered, for a target of 100,000 wafers per month.
We should expect that the goal is to not have the EUV machines limit the overall fab throughput. If the machine only outputs 833 wafers in a day (e.g., 43 WPH with 80% uptime), then ordering 15 machines for 3 streams is insufficient to reach 100,000 wafers per month (only 75,000 wafers per month reached) for the 1c ramp. It is therefore necessary to add an extra 5 machines to make up a fourth stream to prevent the fab from being EUV-limited. On the other hand, if the machine wafer throughput had been 1111 wafers per day (e.g., 58 WPH with 80% uptime) or more, then 15 machines would have been sufficient. So, it can be estimated that under current operating conditions, the machine is operating at less than ~50 WPH. This could be likely due to very high exposure doses needed. Alternatively, the uptime or utilization is actually much lower than 80%, perhaps around 20% or even lower. This could be due to periodic contamination removal.
If the filing is wrong, then these numbers do not reflect actual productivity, so that not so many EUV machines needed to be ordered. For example, 5 machines for 5 layers can reach 100,000 wafers per month if each machine can output 3333 wafers per day (e.g., 174 WPH with 80% uptime). Unlike advanced node logic, there are only about ten DRAM layers that need to go beyond the resolution limit of DUV single exposure, so an order on the scale of 20 EUV machines really indicates that for these machines, effective throughput is significantly less than 100 WPH.
References
[1] SK hynix/Decision to acquire tangible assets/2026.03.24
[2] SK hynix/Decision to acquire tangible assets/2021.02.24
[3] SK Hynix 2025 profit soars, surpasses Samsung on AI boom
[5] SK하이닉스 "1c D램서 EUV 적층 수 5개층 이상 적용" - ZDNet korea; SK Hynix to adopt Inpria MOR in 1c DRAM - THE ELEC, Korea Electronics Industry Media
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